Increasing GPU Throughput using Kernel Interleaved Thread Block Scheduling

Mihir Awatramani, Joseph Zambreno, Diane Rover
Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa, USA
International Conference on Computer Design (ICCD), 2013

   title={Increasing GPU Throughput using Kernel Interleaved Thread Block Scheduling},

   booktitle={Proceedings of the International Conference on Computer Design (ICCD)},



   author={Mihir Awatramani and Joseph Zambreno and Diane Rover}


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The number of active threads required to achieve peak application throughput on graphics processing units (GPUs) depends largely on the ratio of time spent on computation to the time spent accessing data from memory. While compute-intensive applications can achieve peak throughput with a low number of threads, memory-intensive applications might not achieve good throughput even at the maximum supported thread count. In this paper, we study the effects of scheduling work from multiple applications on the same GPU core. We claim that interleaving workload from different applications on a GPU core can improve the utilization of computational units and reduce the load on memory subsystem. Experiments on 17 application pairs from the Rodinia benchmark suite show that overall throughput increases by 7% on average.
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