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CHO: A Benchmark Suite for OpenCL-based FPGA Accelerators

Geoffrey Ndu, Mikel Lujan, Javier Navaridas
The Advanced Processors Technologies Research Group, School of Computer Science, The University of Manchester, Manchester, UK
University of Manchester Technical Report, UNIMAN-COMP-APT-TR-02-05-2014, 2014

@article{ndu2014cho,

   title={CHO: A Benchmark Suite for OpenCL-based FPGA Accelerators},

   author={Ndu, Geoffrey and Lujan, Mikel and Navaridas, Javier},

   year={2014}

}

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Programming FPGAs with OpenCL-based high-level synthesis frameworks is gaining attention with a number of commercial and research frameworks announced. However, there are no benchmarks for evaluating these frameworks. To this end, we present CHO benchmark suite an extension of CHStone, a commonly used C-based high-level synthesis benchmark suite, for OpenCl. We characterise CHO at various levels and use it to investigate compiling non-trivial software to FPGAs.
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