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A Survey Of Architectural Techniques for Near-Threshold Computing

Sparsh Mittal
Oak Ridge National Laboratory (ORNL)
ACM Journal on Emerging Technologies in Computing Systems (JETC), 2015

@article{mittal2015surveyNTC,

   title={A Survey Of Architectural Techniques for Near-Threshold Computing },

   year={2015},

   author={Sparsh Mittal},

   journal={ACM Journal on Emerging Technologies in Computing Systems (JETC)}

}

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Energy efficiency has now become the primary obstacle in scaling the performance of all classes of computing systems. Low-voltage computing and specifically, near-threshold voltage computing (NTC), which involves operating the transistor very close to and yet above its threshold voltage, holds the promise of providing many-fold improvement in energy efficiency. However, use of NTC also presents several challenges such as increased parametric variation, failure rate and performance loss etc. This paper surveys several recent techniques which aim to offset these challenges for fully leveraging the potential of NTC. By classifying these techniques along several dimensions, we also highlight their similarities and differences. It is hoped that this paper will provide insights into state-of-art NTC techniques to researchers and system-designers and inspire further research in this field.
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