A Survey Of Architectural Techniques for Managing Process Variation

Sparsh Mittal
Oak Ridge National Laboratory (ORNL)
ACM Computing Surveys 2016


   title={A Survey Of Architectural Techniques for Managing Process Variation},


   author={Sparsh Mittal},

   journal={ACM Computing Surveys},


   keywords={process variation, survey, cache, processor core, review}


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Process variation –deviation in parameters from their nominal specifications– threatens to slow down and even pause technological scaling and mitigation of it is the way to continue the benefits of chip miniaturization. In this paper, we present a survey of architectural techniques for managing process variation (PV) in modern processors. We also classify these techniques based on several important parameters to bring out their similarities and differences. The aim of this paper is to provide insights to the researchers into the state-of-art in PV management techniques and motivate them to further improve these techniques for designing PV resilient processors of tomorrow.
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