high performance computing on graphics processing units: hgpu.org

Science and Engineering has benefited enormously from the advent of modern (digital) computing. As technology continues to grow, computation capability becomes exponentially faster, more reliable, and more efficient. While modeling and simulations have hurdled analysis past many years of trial and error, they still are restricted by resources, even with modern computing. Whether running Monte Carlo simulations, or optimizing missile designs, reducing run-time of simulations is still an ultimate goal, as faster results are better results. The method considered in this research gives an ordinary computer something resembling the power of a supercomputer. Over the past decade, innovative processing architecture has been introduced to the field of scientific computing, to improve the High Performance Computing (HPC) sector: Compute Unified Device Architecture (CUDA). The architecture is designed to have high Floating Point OperationS (FLOPS) throughput by efficiently performing calculations and fetching data concurrently. This creates a situation in which the device spends the majority of the time on computing by constantly crunching numbers instead of waiting on necessary data. A CUDA implementation of a Six-Degrees-of-Freedom (DOF) simulator is used with a Binary Genetic Algorithm and a routine which calculates missile flight properties, to optimize missile design. The performance of which, exceeds that of the same code run on high performance central processing units. The results presented are validation metrics, performance metrics of simulator studies and Optimization studies, and future optimization techniques.