15846

Parallelizing Word2Vec in Shared and Distributed Memory

Shihao Ji, Nadathur Satish, Sheng Li, Pradeep Dubey
Parallel Computing Lab, Intel Labs, USA
arXiv:1604.04661 [cs.DC], (15 Apr 2016)
@article{ji2016parallelizing,

   title={Parallelizing Word2Vec in Shared and Distributed Memory},

   author={Ji, Shihao and Satish, Nadathur and Li, Sheng and Dubey, Pradeep},

   year={2016},

   month={apr},

   archivePrefix={"arXiv"},

   primaryClass={cs.DC}

}

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Word2Vec is a widely used algorithm for extracting low-dimensional vector representations of words. It generated considerable excitement in the machine learning and natural language processing (NLP) communities recently due to its exceptional performance in many NLP applications such as named entity recognition, sentiment analysis, machine translation and question answering. State-of-the-art algorithms including those by Mikolov et al. have been parallelized for multi-core CPU architectures but are based on vector-vector operations that are memory-bandwidth intensive and do not efficiently use computational resources. In this work, we improve reuse of various data structures in the algorithm through the use of minibatching, hence allowing us to express the problem using matrix multiply operations. We also explore different techniques to parallelize word2vec computation across nodes in a compute cluster, and demonstrate good strong scalability up to 32 nodes. In combination, these techniques allow us to scale up the computation near linearly across cores and nodes, and process hundreds of millions of words per second, which is the fastest word2vec implementation to the best of our knowledge.
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