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Comparing Parallel Hardware Architectures for Visually Guided Robot Navigation

Wolfram Schenck, Michael Horst, Tim Tiedemann, Sergius Gaulik, Ralf Moller
Computer Engineering Group, Faculty of Technology, Bielefeld University, Universitatsstrasse 25, 33615 Bielefeld, Germany
Concurrency and Computation: Practice and Experience, 2016
@article{schenck2016comparing,

   title={Comparing Parallel Hardware Architectures for Visually Guided Robot Navigation},

   author={Schenck, Wolfram and Horst, Michael and Tiedemann, Tim and Gaulik, Sergius and M{"o}ller, Ralf},

   year={2016}

}

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Local visual homing methods are a family of algorithms for visually guided navigation on mobile robots. Within this family, the so-called Min-Warping algorithm yields very precise results but is rather compute-intensive. For this reason, we developed several implementations of this algorithm for different parallel hardware architectures (multi-core CPUs with SIMD extensions, GPUs, FPGA) to arrive at a fast and energy-efficient solution which is suited for real-time performance on mobile platforms with limited battery capacity. Because the Min-Warping algorithm is also well suited as a general benchmark, we carried out a comprehensive comparison study which includes both speed and real power measurements and covers both low-power processors and high-end devices. Our findings suggest that FPGAs offer the most energy-efficient platform for Min-Warping in the area of low-power processors, while GPUs take the lead in the area of high-end devices. However, as soon as the full capabilities of modern CPUs (like SIMD execution units and multiple hardware threads) are used, the speedup advantage of GPUs goes down to the single digit range.
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