A Performance Model and Optimization Strategies for Automatic GPU Code Generation of PDE Systems Described by a Domain-Specific Language

Yue Hu
Electrical & Computer Engineering, Louisiana State University
Louisiana State University, 2016


   title={A Performance Model and Optimization Strategies for Automatic GPU Code Generation of PDE Systems Described by a Domain-Specific Language},

   author={Hu, Yue},


   school={Louisiana State University}


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Stencil computations are a class of algorithms operating on multi-dimensional arrays also called grid functions (GFs), which update array elements using their nearest-neighbors. This type of computation forms the basis for computer simulations across almost every field of science, such as computational fluid dynamics. Its mostly regular data access patterns potentially enable it to take advantage of GPU’s high computation and data bandwidth. However, manual GPU programming is time-consuming and error-prone, as well as requiring an in-depth knowledge of GPU architecture and programming. To overcome the difficulties in manual programming, a number of stencil frameworks have been developed to automatically generate GPU codes from user-written stencil code, usually in a Domain Specific Language. The previous stencil frameworks demonstrate the feasibility, but they also introduce a set of unprecedented challenges in real stencil applications. This dissertation is based on the Chemora stencil framework, aiming to better deal with real stencil applications, especially with large stencil calculations. The large calculations usually consist of dozens of GFs with a variety of stencil patterns, resulting in extremely large code-generation ways. First, we propose an algorithm to map a calculation into one or more kernels by minimizing off-chip memory accesses while maintaining a relatively high thread-level parallelism. Second, we propose an efficiency-based buffering algorithm which operates by scoring a change in buffering strategy for a GF using a performance estimation and resource usage. Let b (i.e., 5) denote the number of buffering strategies the framework supports. With the algorithm, a near optimal solution can be found in (b-1)N(N+1)/2 steps, instead of b^N steps, for a calculation with N GFs. Third, we wrote a set of microbenchmarks to explore and measure some performance-critical GPU microarchitecture features and parameters for better performance modeling. Finally, we propose an analytic performance model to predict the execution time.
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