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FPGA-GPU architecture for kernel SVM pedestrian detection

Sebastian Bauer, Sebastian Kohler, Konrad Doll, Ulrich Brunsmann
Pattern Recognition Lab, Department of Computer Science, University Erlangen-Nuremberg, Germany
Computer Vision and Pattern Recognition Workshops (CVPRW), 2010 IEEE Computer Society Conference (June 2010), pp. 61-68

@conference{bauer2010fpga,

   title={FPGA-GPU architecture for kernel SVM pedestrian detection},

   author={Bauer, S. and Kohler, S. and Doll, K. and Brunsmann, U.},

   booktitle={Computer Vision and Pattern Recognition Workshops (CVPRW), 2010 IEEE Computer Society Conference on},

   pages={61–68},

   year={2010},

   organization={IEEE}

}

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We present a real-time multi-sensor architecture for video-based pedestrian detection used within a road side unit for intersection assistance. The entire system is implemented on available PC hardware, combining a frame grabber board with embedded FPGA and a graphics card into a powerful processing network. Giving classification performance top priority, we use HOG descriptors with a Gaussian kernel support vector machine. In order to achieve real-time performance, we propose a hardware architecture that incorporates FPGA-based feature extraction and GPU-based classification. The FPGA-GPU pipeline is managed by a multi-core CPU that further performs sensor data fusion. Evaluation on the INRIA benchmark database and an experimental study on a real-world intersection using multi-spectral hypothesis generation confirm state-of-the-art classification and real-time performance.
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