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APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters

Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Andrea Salamon, Gaetano Salina, Francesco Simula, Laura Tosoratto, Piero Vicini
INFN Tor Vergata, Roma
arXiv:1102.3796 [physics.comp-ph] (18 Feb 2011)

@article{2011arXiv1102.3796A,

   author={Ammendola}, R. and {Biagioni}, A. and {Frezza}, O. and {Lo Cicero}, F. and {Lonardo}, A. and {Stanislao Paolucci}, P. and {Rossetti}, D. and {Salamon}, A. and {Salina}, G. and {Simula}, F. and {Tosoratto}, L. and {Vicini}, P.},

   title={“{APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters}”},

   journal={ArXiv e-prints},

   archivePrefix={“arXiv”},

   eprint={1102.3796},

   primaryClass={“physics.comp-ph”},

   keywords={Physics – Computational Physics, Computer Science – Hardware Architecture},

   year={2011},

   month={feb},

   adsurl={http://adsabs.harvard.edu/abs/2011arXiv1102.3796A},

   adsnote={Provided by the SAO/NASA Astrophysics Data System}

}

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We describe herein the APElink+ board, a PCIe interconnect adapter featuring the latest advances in wire speed and interface technology plus hardware support for a RDMA programming model and experimental acceleration of GPU networking; this design allows us to build a low latency, high bandwidth PC cluster, the APEnet+ network, the new generation of our cost-effective, tens-of-thousands-scalable cluster network architecture. Some test results and characterization of data transmission of a complete testbench, based on a commercial development card mounting an Altera FPGA, are provided.
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