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IP routing processing with graphic processors

Shuai Mu, Xinya Zhang, Nairen Zhang, Jiaxin Lu, Yangdong Steve Deng, Shu Zhang
Tsinghua University, Beijing, China
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010

@conference{mu2010ip,

   title={Ip routing processing with graphic processors},

   author={Mu, S. and Zhang, X. and Zhang, N. and Lu, J. and Deng, Y.S. and Zhang, S.},

   booktitle={Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010},

   pages={93–98},

   issn={1530-1591},

   year={2010},

   organization={IEEE}

}

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Throughput and programmability have always been the central, but generally conflicting concerns for modern IP router designs. Current high performance routers depend on proprietary hardware solutions, which make it difficult to adapt to ever-changing network protocols. On the other hand, software routers offer the best flexibility and programmability, but could only achieve a throughput one order of magnitude lower. Modern GPUs are offering significant computing power, and its data-parallel computing model well matches the typical patterns of packet processing on routers. Accordingly, in this research we investigate the potential of CUDA-enabled GPUs for IP routing applications. As a first step toward exploring the architecture of a GPU based software router, we developed GPU solutions for a series of core IP routing applications such as IP routing table lookup and pattern match. For the deep packet inspection application, we implemented both a Bloom-filter based string matching algorithm and a finite automata based regular expression matching algorithm. A GPU based routing table lookup solution is also proposed in this work. Experimental results proved that GPU could accelerate the routing processing by one order of magnitude. Our work suggests that, with proper architectural modifications, GPU based software routers could deliver significant higher throughput than previous CPU based solutions.
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