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Data handling inefficiencies between CUDA, 3D rendering, and system memory

B. Gordon, S. Sohoni, D. Chandler
Electr. & Comput. Eng. Dept., Oklahoma State Univ., Stillwater, OK, USA
IEEE International Symposium on Workload Characterization (IISWC), 2010

@conference{gordon2010data,

   title={Data handling inefficiencies between CUDA, 3D rendering, and system memory},

   author={Gordon, B. and Sohoni, S. and Chandler, D.},

   booktitle={Workload Characterization (IISWC), 2010 IEEE International Symposium on},

   pages={1–10},

   organization={IEEE}

}

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While GPGPU programming offers faster computation of highly parallelized code, the memory bandwidth between the system and the GPU can create a bottleneck that reduces the potential gains. CUDA is a prominent GPGPU API which can transfer data to and from system code, and which can also access data used by 3D rendering APIs. In an application that relies on both GPU programming APIs to accelerate 3D modeling and an easily parallelized algorithm, the hidden inefficiencies of nVidia’s data handling with CUDA become apparent. First, CUDA uses the CPU’s store units to copy data between the graphics card and system memory instead of using a more efficient method like DMA. Second, data exchanged between the two GPU-based APIs travels through the main processor instead of staying on the GPU. As a result, a non-GPGPU implementation of a program runs faster than the same program using GPGPU.
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