4335

Design Exploration of Quadrature Methods in Option Pricing

Anson H. T. Tse, David Thomas, Wayne Luk
Computing, Imperial College London, London, United Kingdom
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011

@article{tsedesign,

   title={Design Exploration of Quadrature Methods in Option Pricing},

   author={Tse, A.H.T. and Thomas, D. and Luk, W.},

   booktitle={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},

   year={2011}

}

Download Download (PDF)   View View   Source Source   

546

views

This paper presents a novel parallel architecture for accelerating quadrature methods used for pricing complex multi-dimensional options, such as discrete barrier, Bermudan and American options. We explore different designs of the quadrature evaluation core including optimized pipelined hardware designs in reconfigurable logic and a compute unified device architecture (CUDA)-based graphics processing unit (GPU) design. A parametrizable automated system is presented for generating hardware quadrature evaluation cores with an arbitrary number of dimensions. The performance and energy consumption of field-programmable gate arrays (FPGAs), GPUs, and central processing units (CPUs) are compared across different number of dimensions and precisions. Our evaluation shows that the 100 MHz Virtex-4 xc4vlx160 FPGA design is 4.6 times faster and 25.9 times more energy efficient than a multi-threaded optimized software implementation running on a Xeon W3504 dual-core CPU. It is also 2.6 times faster and 25.4 times more energy efficient than a GPU with comparable silicon process technology.
No votes yet.
Please wait...

* * *

* * *

HGPU group © 2010-2017 hgpu.org

All rights belong to the respective authors

Contact us: