4404

Accelerating batched 1D-FFT with a CUDA-capable computer

R. de Beer, D. van Ormondt, F. Di Cesare, D. Graveron-Demilly, D.A. Karras, Z. Starcuk
Department of Applied Physics, University of Technology Delft, Delft, Netherlands
IEEE International Conference on Imaging Systems and Techniques (IST), 2010

@inproceedings{de2010accelerating,

   title={Accelerating batched 1D-FFT with a CUDA-capable computer},

   author={de Beer, R. and van Ormondt, D. and Di Cesare, F. and Graveron-Demilly, D. and Karras, DA and Starcuk, Z.},

   booktitle={Imaging Systems and Techniques (IST), 2010 IEEE International Conference on},

   pages={446–451},

   organization={IEEE},

   year={2010}

}

Download Download (PDF)   View View   Source Source   

808

views

This work concerns the application of CUDA-based software (Compute Unified Device Architecture), developed by NVIDIA for programmable Graphics Processing units (GPUs). CUDA code is written in ‘C for CUDA’, indicating the standard C programming language with NVIDIA extensions.Our goal was to find out, whether batched (multiple) one-dimensional Fast Fourier Transformation (1DFFT), often encountered in various fields of signal processing, can be speeded up significantly by exploiting the parellel-processing power of a low-cost, standard, CUDA-enabled graphics card in a home-assembled PC.
No votes yet.
Please wait...

* * *

* * *

HGPU group © 2010-2017 hgpu.org

All rights belong to the respective authors

Contact us: