Data Parallelism Exploiting for H.264 Encoder
Parallel and Distributed Processing Laboratory, National University of Defense Technology, Changsha, China
International Conference on Multimedia and Signal Processing (CMSP), 2011
@article{wen2011data,
title={Data Parallelism Exploiting for H. 264 Encoder},
author={Wen, M. and Ren, J. and Wu, N. and Su, H. and Xun, C. and Zhang, C.},
booktitle={International Conference on Multimedia and Signal Processing (CMSP), 2011},
year={2011}
}
Real-time H.264 encoding of high-definition (HD) video (up to 1080p) is a challenge workload to most existing programmable processors. Instead, the novel programmable parallel processors such as stream processor, Graphic processor unit (GPU) and DSP offer a different and very promising technology for these demands. Thus, parallel computing for H.264 encoding on these processors is becoming a hot research point. It’s challenged, because most emerging parallel processors focus on supporting Data Level Parallel (DLP), while the dependency inherently existing in traditional H.264 encoding algorithm significantly restricts exploiting DLP. Facing the challenge, this paper presents data parallel processing methods for key modules of H.264 encoder which can eliminate the dependency restriction. The result shows that key modules including Intra-prediction, Inter-prediction and CAVLC achieve significant speedup on stream processor by using these data parallel processing methods.
August 12, 2011 by hgpu
