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The impact of diverse memory architectures on multicore consumer software: an industrial perspective from the video games domain

George Russel, Colin Riley, Neil Henning, Uwe Dolinsky, Andrew Richards, Alastair F. Donaldson, Alexander S. van Amesfoort
Codeplay Software Ltd.
Proceedings of the 2011 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, MSPC ’11, 2011

@inproceedings{russel2011impact,

   title={The impact of diverse memory architectures on multicore consumer software: an industrial perspective from the video games domain},

   author={Russel, G. and Riley, C. and Henning, N. and Dolinsky, U. and Richards, A. and Donaldson, A.F. and van Amesfoort, A.S.},

   booktitle={Proceedings of the 2011 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness},

   pages={37–42},

   year={2011},

   organization={ACM}

}

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Memory architectures need to adapt in order for performance and scalability to be achieved in software for multicore systems. In this paper, we discuss the impact of techniques for scalable memory architectures, especially the use of multiple, non-cache-coherent memory spaces, on the implementation and performance of consumer software. Primarily, we report extensive real-world experience in this area gained by Codeplay Software Ltd., a software tools company working in the area of compilers for video games and GPU software. We discuss the solutions we use to handle variations in memory architecture in consumer software, and the impact such variations have on software development effort and, consequently, development cost. This paper introduces preliminary findings regarding impact on software, in advance of a larger-scale analysis planned over the next few years. The techniques discussed have been employed successfully in the development and optimisation of a shipping AAA cross-platform video game.
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