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FATSEA-An Architectural Simulator for General Purpose Computing on GPUs

K.E. Ostby, J.L. Aragon, J.M. Garcia, M. Ujaldon
Computer Engineering and Technology Dept., University of Murcia, Spain
2nd Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (co-located with 5th Int’l. Conf. on High-Performance and Embedded Architectures and Compilers, HiPEAC’10), 2010

@article{ostby2010fatsea,

   title={FATSEA–An Architectural Simulator for General Purpose Computing on GPUs},

   author={O}stby, KE and Arag{‘o}n, JL and Garc{i}a, JM and Ujald{‘o}n, M.},

   publisher={Citeseer},

   year={2010}

}

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We present FATSEA, a functional and performance evaluation simulator written in C++ to handle kernels written in the CUDA programming language aimed for GPGPU computing. FATSEA takes a Parallel Thread eXecution (PTX ) code as input, which is a device independent code format generated by the Nvidia CUDA compiler, to validate results and estimate performance on Nvidia platforms. This paper shows results on a G80-based architecture for a set of well-known kernels to illustrate the usefulness of our framework while performing a preliminary validation for the tool.
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