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TEG: GPU Performance Estimation Using a Timing Model

Junjie Lai, Andre Seznec
Project-Team ALF
Research Report no 7804, 2011

@techreport{LAI:2011:HAL-00641726:1,

   hal_id={hal-00641726},

   url={http://hal.inria.fr/hal-00641726/en/},

   title={TEG: GPU Performance Estimation Using a Timing Model},

   author={Lai, Junjie and Seznec, Andr{‘e}},

   language={Anglais},

   affiliation={ALF – INRIA – IRISA – INRIA – Universit{‘e} de Rennes I},

   type={Rapport de recherche},

   institution={INRIA},

   number={RR-7804},

   year={2011},

   month={Nov},

   pdf={http://hal.inria.fr/hal-00641726/PDF/RR-7804.pdf}

}

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Modern Graphic Processing Units (GPUs) offer significant performance speedup over conventional processors. Programming on GPU for general purpose applications has become an important research area. CUDA programming model provides a C-like interface and is widely accepted. However, since hardware vendors do not disclose enough underlying architecture details, programmers have to optimize their applications without fully understanding the performance characteristics. In this paper we present a GPU timing model to provide more insights into the applications’ performance on GPU. A GPU CUDA program timing estimation tool (TEG) is developed based on the GPU timing model. Especially, TEG illustrates how performance scales from one warp (CUDA thread group) to multiple concurrent warps on SM (Streaming Multiprocessor). Because TEG takes the native GPU assembly code as input, it allows to estimate the execution time with only a small error. TEG can help programmers to better understand the performance results and quantify bottlenecks’ performance effects.
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