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High-Level Support for Pipeline Parallelism on Many-Core Architectures

Siegfried Benkner, Enes Bajrovic, Erich Marth, Martin Sandrieser, Raymond Namyst, Samuel Thibault
Research Group Scientific Computing, University of Vienna, Austria
Europar – International European Conference on Parallel and Distributed Computing, 2012

@inproceedings{BENKNER-2012-697020,

   hal_id={hal-00697020},

   url={http://hal.inria.fr/hal-00697020},

   title={High-Level Support for Pipeline Parallelism on Many-Core Architectures},

   author={Benkner, Siegfried and Bajrovic, Enes and Marth, Erich and Sandrieser, Martin and Namyst, Raymond and Thibault, Samuel},

   language={English},

   affiliation={University of Vienna , Laboratoire Bordelais de Recherche en Informatique – LaBRI , RUNTIME – INRIA Bordeaux – Sud-Ouest},

   booktitle={Europar – International European Conference on Parallel and Distributed Computing – 2012},

   address={Rhodes Island, Greece},

   audience={international},

   year={2012},

   month={Aug},

   pdf={http://hal.inria.fr/hal-00697020/PDF/europar2012-submitted.pdf}

}

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With the increasing architectural diversity of many-core architectures the challenges of parallel programming and code portability will sharply rise. The EU project PEPPHER addresses these issues with a component-based approach to application development on top of a task-parallel execution model. Central to this approach are multi-architectural components which encapsulate different implementation variants of application functionality tailored for different core types. An intelligent run-time system selects and dynamically schedules component implementation variants for efficient parallel execution on heterogeneous many-core architectures. On top of this model we have developed language, compiler and runtime support for a specific class of applications that can be expressed using the pipeline pattern. We propose C/C++ language annotations for specifying pipeline patterns and describe the associated compilation and runtime infrastructure. Experimental results indicate that with our high-level approach performance comparable to manual parallelization can be achieved.
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