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Parallel Statistical Analysis of Analog Circuits by GPU-accelerated Graph-based Approach

Xue-Xin Liu, Sheldon X.-D. Tan, Hai Wang
Dept. Electrical Engineering, University of California, Riverside, CA 92521
Design, Automation and Test in Europe (DATE), 2012

@article{liu2012parallel,

   title={Parallel Statistical Analysis of Analog Circuits by GPU-accelerated Graph-based Approach},

   author={Liu, X.X. and Tan, S.X.D. and Wang, H.},

   year={2012}

}

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In this paper, we propose a new parallel statistical analysis method for large analog circuits using determinant decision diagram (DDD) based graph technique based on GPU platforms. DDD-based symbolic analysis technique enables exact symbolic analysis of vary large analog circuits. But we show that DDD-based graph analysis is very amenable for massively threaded based parallel computing based on GPU platforms. We design novel data structures to represent the DDD graphs in the GPUs to enable fast memory access of massive parallel threads for computing the numerical values of DDD graphs. The new method is inspired by inherent data parallelism and simple data independence in the DDD-based numerical evaluation process. Experimental results show that the new evaluation algorithm can achieve about one to two order of magnitudes speedup over the serial CPU based evaluations and 2-3 times speedup over numerical SPICE-based simulation method on some large analog circuits.
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