8798

Inter-Warp Instruction Temporal Locality in Deep-Multithreaded GPUs

Ahmad Lashgar, Amirali Baniasadi, Ahmad Khonsari
School of Electrical and Computer Engineering, University College of Engineering, University of Tehran, Tehran, Iran
26th International Conference on Architecture of Computing Systems (ARCS 2013), 2013
@article{lashgarinter2013inter,

   title={Inter-Warp Instruction Temporal Locality in Deep-Multithreaded GPUs},

   author={Lashgar, A. and Baniasadi, A. and Khonsari, A.},

   year={2013}

}

Download Download (PDF)   View View   Source Source   

721

views

GPUs employ thousands of threads per core to achieve high throughput. These threads exhibit localities in control-flow, instruction and data addresses and values. In this study we investigate inter-warp instruction temporal locality and show that during short intervals a significant share of fetched instructions are fetched unnecessarily. This observation provides several opportunities to enhance GPUs. We discuss different possibilities and evaluate filter cache as a case study. Moreover, we investigate how variations in microarchitectural parameters impacts potential filter cache benefits in GPUs.
VN:F [1.9.22_1171]
Rating: 1.0/5 (1 vote cast)
Inter-Warp Instruction Temporal Locality in Deep-Multithreaded GPUs, 1.0 out of 5 based on 1 rating

* * *

* * *

Follow us on Twitter

HGPU group

1943 peoples are following HGPU @twitter

Like us on Facebook

HGPU group

442 people like HGPU on Facebook

HGPU group © 2010-2016 hgpu.org

All rights belong to the respective authors

Contact us: