Performance Analysis and Tuning For: General-Purpose Graphics Processing Units (GPGPU)

Hyesoon Kim, Richard Vuduc, Wen-mei Hwu, Sara Baghsorkhi
Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign
Morgan & Claypool Publishers, 2013

   title={Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU)},

   author={Kim, H. and Vuduc, R. and Baghsorkhi, S. and Choi, J. and Hwu, W.},

   journal={Synthesis Lectures on Computer Architecture},





   publisher={Morgan & Claypool Publishers}


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General-purpose graphics processing units (GPGPU) have emerged as an important class of shared memory parallel processing architectures, with widespread deployment in every computer class from high-end supercomputers to embedded mobile platforms. Relative to more traditional multicore systems of today, GPGPUs have distinctly higher degrees of hardware multithreading (hundreds of hardware thread contexts vs. tens), a return to wide vector units (several tens vs. 1-10), memory architectures that deliver higher peak memory bandwidth (hundreds of gigabytes per second vs. tens), and smaller caches/scratchpad memories (less than 1 megabyte vs. 1-10 megabytes). In this book, we provide a high-level overview of current GPGPU architectures and programming models. We review the principles that are used in previous shared memory parallel platforms, focusing on recent results in both the theory and practice of parallel algorithms, and suggest a connection to GPGPU platforms. We aim to provide hints to architects about understanding algorithm aspect to GPGPU. We also provide detailed performance analysis and guide optimizations from high-level algorithms to low-level instruction level optimizations. As a case study, we use n-body particle simulations known as the fast multipole method (FMM) as an example. We also briefly survey the state-of-the-art in GPU performance analysis tools and techniques.
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