Speeding Up Model Building for ECGA on CUDA Platform

Chung-Yu Shao, Tian-Li Yu
Taiwan Evolutionary Intelligence Laboratory (TEIL), Department of Electrical Engineering, National Taiwan University, No.1, Sec. 4, Roosevelt Rd., Taipei, Taiwan
TEIL Technical Report No. 2013002, 2013

   title={Speeding Up Model Building for ECGA on CUDA Platform},

   author={Shao, Chung-Yu and Yu, Tian-Li},



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Parallelization is a straightforward approach to enhance the efficiency for evolutionary computation due to its inherently parallel nature. Since NVIDIA released the compute unified device architecture (CUDA), graphic processing units have enabled lots of scalable parallel programs in a wide range of fields. However, parallelization of model building for EDAs is rarely studied. In this paper, we propose two implementations on CUDA to speed up the model building in the extended compact genetic algorithm (ECGA). The first implementation is algorithmically identical to original ECGA. Aiming at a greater speed boost, the second implementation modifies the model building. It slightly decreases the accuracy of models in exchange for more speedup. Empirically, the first implementation achieves a speedup of roughly 233 to the baseline on 250-bit trap problem with order 5, and the second implementation achieves a speedup of roughly 264 to the baseline on the same problem. Finally, both of our implementations scale up to 9,050-bit trap problem with order 5 on one single Tesla C2050 GPU card.
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