Performance Analysis on Energy Efficient High-Performance Architectures

Roman Iakymchuk, Francois Trahay
Institut Mines-Telecom – Telecom SudParis, 9 Rue Charles Fourier, 91000 Evry France
2nd International Conference on Cluster Computing (CC’13), 2013

   title={Performance Analysis on Energy Efficient High-Performance Architectures},

   author={Iakymchuk, Roman and Trahay, Fran{c{c}}ois},



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With the shift in high-performance computing (HPC) towards energy efficient hardware architectures such as accelerators (NVIDIA GPUs) and embedded systems (ARM processors), arose the need to adapt existing performance analysis tools to these new systems. We present EZTrace – a performance analysis framework for parallel applications. EZTrace relies on several core components, in particular on a mechanism for instrumenting functions, a lightweight tool for recording events, and a generic interface for writing traces. To support EZTrace on energy efficient HPC systems, we developed a CUDA module and ported EZTrace to ARM processors. The evaluation on a suite of the standard computation kernels show that EZTrace allows to analyze HPC applications executing on such systems with the low performance overhead.
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