GPU-CC: a Reconfigurable GPU Architecture with Communicating Cores

Gert-Jan van den Braak, Henk Corporaal
Dept. of Electrical Engineering, Electronic Systems Group, Eindhoven University of Technology, The Netherlands
16th International Workshop on Software and Compilers for Embedded Systems (M-SCOPES ’13), 2013

   title={GPU-CC: a reconfigurable GPU architecture with communicating cores},

   author={van den Braak, Gert-Jan and Corporaal, Henk},

   booktitle={Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems},





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GPUs have evolved to programmable, energy efficient compute accelerators for massively parallel applications. Still, compute power is lost in many applications because of cycles spent on data movement and control instead of computations on actual data. Additional cycles can be lost as well on pipeline stalls due to long latency operations. To improve performance and energy efficiency, we introduce GPU-CC: a reconfigurable GPU architecture with communicating cores. It is based on a contemporary GPU, which can still be used as such, but also has the ability to reorganize the cores of a GPU in a reconfigurable network. In GPU-CC data movement and control is implicit in the configuration of the communication network. Additionally each core executes a fixed instruction, reducing instruction decode count and increasing energy efficiency. We show a large performance potential for GPU-CC, e.g. 1.9x and 2.4x for a 3×3 and 5×5 convolution application. The hardware cost of GPU-CC is mainly determined by the buffers in the added network, which amounts to 12.4% of extra memory space.
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