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Posts

Aug, 2

Real-time color holographic video display system

A real-time multi-GPU color holographic video display system computes holograms from 3D video of a rigid object. System has three main stages; client, server and optics. 3D coordinate and texture information are kept in client and sent online to the server through the network. In the server stage, with the help of the parallel processing […]
Aug, 2

Hyperfast Parallel–Beam Backprojection

Tomographic image reconstruction, such as the reconstruction of CT projection values, of tomosynthesis data, PET or SPECT events, is computational very demanding. The most time-consuming step is the backprojection which is often limited by the memory bandwidth. Recently, a novel general purpose architecture optimized for distributed computing became available: the Cell Broadband Engine (CBE). Its […]
Aug, 2

Unifying stream based and reconfigurable computing to design application accelerators

To facilitate the design of hardware accelerators we have proposed the adoption of the stream-based computing model and the usage of Graphics Processing Units (GPUs) as prototyping platforms. This model exposes the maximum data parallelism available in the applications and decouples computation from memory accesses. In this paper we go a step further in showing […]
Aug, 2

Potential contribution of CNN-based solving of stiff ODEs and PDEs to enabling real-time Computational Engineering

One of the most common approaches to avoid complexity while numerically solving stiff ordinary differential equations (ODEs) is approximating them by ignoring the nonlinear terms. While facing stiff partial differential equations (PDEs) the same is done by avoiding/suppressing the nonlinear terms from the Taylor’s series expansion. By so doing, the traditional methods for solving stiff […]
Aug, 2

Cost-effective low-power graphics processing unit for handheld devices

Cost-effective handheld graphics processing units are discussed in the aspects of performance, memory bandwidth, power, and area requirements. The proposed RamP architecture has special features of cost-effective low-power arithmetic units, memory bandwidth reduction, and dynamic power management schemes for handheld GPUs. The detailed design of RamP- VI is explained as an example of the RamP […]
Aug, 1

Performance Debugging of GPGPU Applications with the Divergence Map

The increasing programability and the high computational power of Graphical Processing Units (GPU) make them attractive to general purpose programming. However, taking full benefit of this execution environment is a challenging task. One of these challenges stem from divergences, a phenomenon that occurs when threads that execute in lock-step are forced to take different program […]
Aug, 1

Real-time free viewpoint video from uncalibrated cameras using plane-sweep algorithm

In this paper, we present a new online video-based rendering (VBR) method that creates new views of a scene from uncalibrated cameras. Our method does not require information about the cameras intrinsic parameters. For obtaining a geometrical relation among the cameras, we use projective grid space (PGS) which is 3D space defined by epipolar geometry […]
Aug, 1

Adaptive, real-time visual simultaneous localization and mapping

In this paper we present a real-time simultaneous localization and mapping system which uses a stereo camera as its only input. We combine the benefits of KLT feature tracking, which include high speed and robustness to repetitive features, with wide baseline features, which allow for feature matching after large camera motions. Updating the map of […]
Aug, 1

VSIPL++ Acceleration Using Commodity Graphics Processors

The High Performance Embedded Computing Software Initiative (HPEC-SI) is developing a unified software framework for computation and communication for high performance signal processing tasks on parallel computers. The goal of the program is to address the high cost of software in Department of Defense (DoD) systems by improving the portability and productivity of signal processing […]
Aug, 1

Mapping of a film grain removal algorithm to a heterogeneous reconfigurable architecture

Despite recent advances in FPGA, GPU, and general purpose processor technologies, the challenges posed by real-time digital image processing at high resolutions cannot be fully overcome due to insufficient processing capability, inadequate data transport and control mechanisms, and often prohibitively high costs. To address these issues, we proposed a two-phase solution for a real-time film […]
Aug, 1

Real-time Volumetric Haptic and Visual Burrhole Simulation

This paper describes real-time volumetric haptic and visual algorithms developed to simulate burrhole creation for a virtual reality-based craniotomy surgical simulator. A modified Voxmap point-shell algorithm (McNeely et al., 1999), (Renz et al., 2001) is created to simulate haptic interactions between bone cutting tools and voxel-based bone. New surface boundary detection and force feedback calculation […]
Aug, 1

Towards an embedded biologically-inspired machine vision processor

Biologically-inspired machine vision algorithms – those that attempt to capture aspects of the computational architecture of the brain – have proven to be a promising class of algorithms for performing a variety of object and face recognition tasks. However these algorithms typically require a large number of arithmetic operations per image frame evaluated. Meanwhile, the […]
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