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ChamNet: Towards Efficient Network Design through Platform-Aware Model Adaptation

Xiaoliang Dai, Peizhao Zhang, Bichen Wu, Hongxu Yin, Fei Sun, Yanghan Wang, Marat Dukhan, Yunqing Hu, Yiming Wu, Yangqing Jia, Peter Vajda, Matt Uyttendaele, Niraj K. Jha

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Tags: Bayesian, Computer science, CUDA, Deep learning, DSP, Neural networks, nVidia, nVidia GeForce GTX 1060

December 30, 2018 by hgpu

Low-power System-on-Chip Processors for Energy Efficient High Performance Computing: The Texas Instruments Keystone II

Gaurav Mitra

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Tags: ARM, Benchmarking, Computer science, DSP, Heterogeneous systems, Matrix multiplication, nVidia, nVidia Jetson TK1, nVidia Tegra TX1, OpenCL, SoC, Thesis

November 12, 2017 by hgpu

Synthesis of Embedded Software using Dataflow Schedule Graphs

Abhay Raina

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Tags: Computer science, DSP, nVidia, nVidia GeForce GTX 680, OpenCL, Signal processing, Thesis

July 2, 2017 by hgpu

A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA

Xinyu Zhang, Srinjoy Das, Ojash Neopane, Ken Kreutz-Delgado

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Tags: Algorithms, Computer science, Computer vision, Deep learning, DSP, FPGA, Neural networks

May 11, 2017 by hgpu

Resource-Aware Just-in-Time OpenCL Compiler for Coarse-Grained FPGA Overlays

Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy

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Tags: ARM, Computer science, DSP, FPGA, Heterogeneous systems, OpenCL

May 11, 2017 by hgpu

Introduction to the Special Issue on Digital Signal Processing in Radio Astronomy

Danny C. Price, Jonathon Kocz, Matthew Bailes, Lincoln J. Greenhill

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Tags: Astrophysics, CUDA, DSP, FPGA, nVidia, Overview, Signal processing

February 7, 2017 by hgpu

PipeCNN: An OpenCL-Based FPGA Accelerator for Large-Scale Convolution Neuron Networks

Dong Wang, Jianjing An, Ke Xu

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Tags: CNN, Computer science, Deep learning, DSP, FPGA, Hardware Architecture, Neural networks, OpenCL, Package

November 10, 2016 by hgpu

Machine Learning Based Intrusion Detection in Controller Area Networks

Roar Elias Georgsen

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Tags: Computer science, Deep learning, DSP, FPGA, Machine learning, OpenCL, Package, Python, Security, SoC

October 15, 2016 by hgpu

An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform

Xining Yu, Yan Zhang, Ankit Patel, Allen Zahrai, Mark Weber

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Tags: DSP, Filtering, OpenCL, OpenMP, Signal processing

September 10, 2016 by hgpu

Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

Chen Zhang, Zhenman Fang, Peipei Zhou, Peichen Pan, Jason Cong

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Tags: Caffe, Computer science, CUDA, Deep learning, DSP, FPGA, Neural networks, nVidia, Tesla K40

September 8, 2016 by hgpu

CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms

Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Nachiket Kapre

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Tags: Computer science, CUDA, Deep learning, DSP, FPGA, nVidia, nVidia Tegra TX1

August 11, 2016 by hgpu

Soft GPGPUs for Embedded FPGAs: An Architectural Evaluation

Kevin Andryc, Tedy Thomas, Russell Tessier

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Tags: Benchmarking, Computer science, CUDA, DSP, FPGA

June 22, 2016 by hgpu

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

SimSYCL: A SYCL Implementation Targeting Development, Debugging, Simulation and Conformance

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

94% on CIFAR-10 in 3.29 Seconds on a Single GPU

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers

OpenMC Monte Carlo Code

Performance Portable Monte Carlo Particle Transport on Intel, NVIDIA, and AMD GPUs

Polygeist: C/C++ frontend for MLIR

Retargeting and Respecializing GPU Workloads for Performance Portability

Parallel Gaussian process with kernel approximation in CUDA

See all packages

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high performance computing on graphics processing units: hgpu.org

ChamNet: Towards Efficient Network Design through Platform-Aware Model Adaptation

Low-power System-on-Chip Processors for Energy Efficient High Performance Computing: The Texas Instruments Keystone II

Synthesis of Embedded Software using Dataflow Schedule Graphs

A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA

Resource-Aware Just-in-Time OpenCL Compiler for Coarse-Grained FPGA Overlays

Introduction to the Special Issue on Digital Signal Processing in Radio Astronomy

PipeCNN: An OpenCL-Based FPGA Accelerator for Large-Scale Convolution Neuron Networks

Machine Learning Based Intrusion Detection in Controller Area Networks

An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform

Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms

Soft GPGPUs for Embedded FPGAs: An Architectural Evaluation

Recent source codes

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

GPU plugin for PySCF

QArray

Celerity: High-level C++ for Accelerator Clusters

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

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