Memory model | Page 7

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Data Layout Pruning on GPU

Xinbiao Gan, Zhiying Wang, Li Shen, Qi Zhu

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Tags: Computer science, CUDA, Memory, Memory model, nVidia, nVidia GeForce GTX 280, Performance

October 16, 2011 by hgpu

CudaDMA: Optimizing GPU Memory Bandwidth via Warp Specialization

Michael Bauer, Henry Cook, Brucek Khailany

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Source codes

Tags: Benchmarking, Computer science, CUDA, Memory model, nVidia, Optimization, Package, Performance, Tesla C2050

October 14, 2011 by hgpu

Hybrid coherence for scalable multicore architectures

John Henry Kelm

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Tags: Computer science, Memory model, Thesis

October 7, 2011 by hgpu

The architecture of the DecentVM: towards a decentralized virtual machine for many-core computing

Annette Bieniusa, Johannes Eickhold, Thomas Fuhrmann

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Tags: Computer science, Distributed data structures, Memory model, Programming Languages, Programming techniques

September 9, 2011 by hgpu

Compiler-directed memory management for heterogeneous MPSoCs

Miao Wang, Francois Bodin

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Tags: Cell processor, Computer science, Heterogeneous systems, Memory, Memory model, Optimization

September 7, 2011 by hgpu

Elastic pipeline: addressing GPU on-chip shared memory bank conflicts

Chunyang Gou, Georgi N. Gaydadjiev

Tags: Computer science, Memory, Memory model, Performance

August 24, 2011 by hgpu

The Sharing Tracker: Using Ideas from Cache Coherence Hardware to Reduce Off-Chip Memory Traffic with Non-Coherent Caches

David Tarjan, Kevin Skadron

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Tags: Computer science, Memory, Memory model

August 12, 2011 by hgpu

Exploiting SPMD Horizontal Locality

Chunyang Gou, Georgi Gaydadjiev

Tags: Computer science, Memory, Memory model

June 22, 2011 by hgpu

Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures

Byunghyun Jang, Dana Schaa, Perhaad Mistry, David Kaeli

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Tags: ATI, ATI Radeon HD 3870, Brook, Computer science, CUDA, Data parallelism, Memory model, nVidia, nVidia GeForce GTX 285, Review

June 17, 2011 by hgpu

A Memory Centric Kernel Framework for Accelerating Short-Range, Interactive Particle Simulation

Ian Stewart, Shujia Zhou

Tags: Cell processor, Computer science, Memory model, nVidia

June 17, 2011 by hgpu

Memory-efficient implementation of a graphics processor-based cluster detection algorithm for large spatial databases

R.J. Thapa, C. Trefftz, G. Wolffe

Tags: Algorithms, Computer science, Databases, Memory model

June 14, 2011 by hgpu

Exploiting Computing Power on Graphics Processing Unit

Ziyi Liu, Wenjing Ma

Tags: Algorithms, Computer science, CUDA, Memory model, nVidia, Performance

June 5, 2011 by hgpu

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers

OpenMC Monte Carlo Code

Performance Portable Monte Carlo Particle Transport on Intel, NVIDIA, and AMD GPUs

Polygeist: C/C++ frontend for MLIR

Retargeting and Respecializing GPU Workloads for Performance Portability

Parallel Gaussian process with kernel approximation in CUDA

Optical flow algorithms for SYCL

SYCL in the edge: performance and energy evaluation for heterogeneous acceleration

OpenMP5-Offload-OpenMC-Intel-PVC

Distributed OpenMP Offloading of OpenMC on Intel GPU MAX Accelerators

See all packages

* * *

high performance computing on graphics processing units: hgpu.org

Data Layout Pruning on GPU

CudaDMA: Optimizing GPU Memory Bandwidth via Warp Specialization

Hybrid coherence for scalable multicore architectures

The architecture of the DecentVM: towards a decentralized virtual machine for many-core computing

Compiler-directed memory management for heterogeneous MPSoCs

Elastic pipeline: addressing GPU on-chip shared memory bank conflicts

The Sharing Tracker: Using Ideas from Cache Coherence Hardware to Reduce Off-Chip Memory Traffic with Non-Coherent Caches

Exploiting SPMD Horizontal Locality

Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures

A Memory Centric Kernel Framework for Accelerating Short-Range, Interactive Particle Simulation

Memory-efficient implementation of a graphics processor-based cluster detection algorithm for large spatial databases

Exploiting Computing Power on Graphics Processing Unit

Recent source codes

QArray

Celerity: High-level C++ for Accelerator Clusters

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

Optical flow algorithms for SYCL

OpenMP5-Offload-OpenMC-Intel-PVC

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