Parallel Firewalls on General-Purpose Graphics Processing Units
Department of Computer Engineering, Malaviya National Institute of Technology, Jaipur, India
arXiv:1312.4188 [cs.DC], (15 Dec 2013)
@article{2013arXiv1312.4188R,
author={Reddy}, K.~C. and {Tharwani}, A. and {Vamshi Krishna}, C. and {V}, L.},
title={"{Parallel Firewalls on General-Purpose Graphics Processing Units}"},
journal={ArXiv e-prints},
archivePrefix={"arXiv"},
eprint={1312.4188},
primaryClass={"cs.DC"},
keywords={Computer Science – Distributed, Parallel, and Cluster Computing},
year={2013},
month={dec},
adsurl={http://adsabs.harvard.edu/abs/2013arXiv1312.4188R},
adsnote={Provided by the SAO/NASA Astrophysics Data System}
}
Firewalls use a rule database to decide which packets will be allowed from one network onto another thereby implementing a security policy. In high-speed networks as the inter-arrival rate of packets decreases, the latency incurred by a firewall increases. In such a scenario, a single firewall become a bottleneck and reduces the overall throughput of the network.A firewall with heavy load, which is supposed to be a first line of defense against attacks, becomes susceptible to Denial of Service (DoS) attacks. Many works are being done to optimize firewalls.This paper presents our implementation of different parallel firewall models on General-Purpose Graphics Processing Unit (GPGPU). We implemented the parallel firewall architecture proposed in and introduced a new model that can effectively exploit the massively parallel computing capabilities of GPGPU.
December 17, 2013 by hgpu
