A novel hardware acceleration technique for high performance parallel FDTD method
EMC Lab., Pennsylvania State Univ., University Park, PA, USA
IEEE International Conference on Microwave Technology & Computational Electromagnetics (ICMTCE), 2011
@inproceedings{yu2011novel,
title={A novel hardware acceleration technique for high performance parallel FDTD method},
author={Yu, W.},
booktitle={Microwave Technology & Computational Electromagnetics (ICMTCE), 2011 IEEE International Conference on},
pages={441–444},
year={2011},
organization={IEEE}
}
In this paper, we introduce one novel hardware acceleration technique based on a vector unit built in a regular CPU for high performance electromagnetic simulation. We investigate the performance of parallel FDTD method on the Intel and AMD processors accelerated by the Vector Arithmetic Logic Unit (VALU), high performance cluster, and Graphics Processing Unit (GPU). The FDTD method that is parallel in nature is one of the most popular numerical methods to simulate various electromagnetic problems and phenomena. Several examples are employed to demonstrate the engineering applications of parallel conformal FDTD method based on the VALU acceleration.
July 28, 2011 by hgpu
