GPGPU accelerated optimization method of Interconnection Network Topology
Department of Computer Science, University of Matej Bel, Tajovskeho 40, 97401 Banska Bystrica, Slovak Republic
6th WSEAS European Computing Conference (ECC ’12), 2012
@article{siladi2012gpgpu,
title={GPGPU accelerated optimization method of Interconnection Network Topology},
author={SIL{‘A}DI, V. and HURAJ, L. and POVINSK{‘Y}, M.},
year={2012}
}
The optimization of the irregular connection network of the multiprocessor systems with the distributed memory is the NP complete problem which is generally compute-intensive process. Graphics processing units provide a large computational power at a very low price allowing the fine-grained parallelism. This work investigates the use of the GPU in the parallelisation of the optimal irregular network configurations up to 128 processors. We used a modified hill climbing optimization technique for finding better solutions for interconnection network topology. Using NVIDIA’s Compute Unified Device Architecture, our implementation achieves a processing speed up of 1.71 to 7.96 times over a sequential Central Processing Unit approach and it is comparable to existing approaches.
October 6, 2012 by hgpu
