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Fast Turnaround HLS Debugging using Dependency Analysis and Debug Overlays

Al-Shahna Jamal, Eli Cahill, Jeffrey Goeders,Steven J.E. Wilton

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Tags: Computer science, FPGA, HLS

January 12, 2020 by hgpu

A Highly Parameterizable Framework for Conditional Restricted Boltzmann Machine Based Workloads Accelerated With FPGAs and OpenCL

Zoran Jaksic, Nicola Cadenelli, David Buchaca Prats, Jorda Polo, Josep Lluis Berral Garcia, David Carrera Perez

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Tags: Computer science, FPGA, HLS, Linear Algebra, Matrix multiplication, Neural networks, OpenCL

November 17, 2019 by hgpu

In-memory database acceleration on FPGAs: a survey

Jian Fang, Yvo T. B. Mulder, Jan Hidders, Jinho Lee, H. Peter Hofstee

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Tags: Computer science, Databases, FPGA, HLS, OpenCL, survey

November 3, 2019 by hgpu

Performance Debugging Frameworks for FPGA High-Level Synthesis

Young-kyu Choi

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Tags: Benchmarking, Computer science, Design space exploration, FPGA, HLS, Performance, Thesis

October 27, 2019 by hgpu

The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface

Hamid Reza Zohouri, Satoshi Matsuoka

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Tags: Benchmarking, Computer science, FPGA, HLS, Memory, nVidia, OpenCL, Package, Tesla K20, Tesla V100

October 20, 2019 by hgpu

Heterogeneous Resource-Elastic Management for FPGAs: Concepts, Theory and Implementation

Anuj Vaishnav, Dirk Koch, Khoa Dang Pham

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Tags: Computer science, FPGA, Heterogeneous systems, HLS, OpenCL

September 29, 2019 by hgpu

Fast Code Exploration for Pipeline Processing in FPGA Accelerators

Leandro de Souza Rosa

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Tags: Computer science, Design space exploration, FPGA, HLS, Thesis

September 8, 2019 by hgpu

High Performance Computing via High Level Synthesis

Mehdi Roozmeh

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Tags: Computer science, Design space exploration, FPGA, Heterogeneous systems, HLS, Nearest neighbour, nVidia, OpenCL, Package, Signal processing, Thesis

August 18, 2019 by hgpu

FBLAS: Streaming Linear Algebra on FPGA

Tiziano De Matteis, Johannes de Fine Licht, Torsten Hoefler

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Tags: Computer science, FPGA, HLS, Linear Algebra, Package

July 28, 2019 by hgpu

Exploring Portability and Performance of OpenCL FPGA Kernels on Intel HARPv2

Anthony M. Cabrera, Roger D. Chamberlain

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Tags: Computer science, FPGA, Heterogeneous systems, HLS, OpenCL

July 7, 2019 by hgpu

FPGA Implementation of Reduced Precision Convolutional Neural Networks

Muhammad Mohid Nabil

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Tags: Computer science, CUDA, Deep learning, FPGA, HLS, Image recognition, Machine learning, Neural networks, nVidia, nVidia GeForce GTX 1080, Precision, Thesis

May 12, 2019 by hgpu

The Study of the OpenCL Processing Models for the FPGA Devices

Piotr Szkotak, Pawel Russek, Kazimierz Wiatr

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Tags: AMD Radeon R9 290, ATI, Computer science, FPGA, HLS, nVidia, nVidia GeForce GTX 1080, OpenCL, Package

April 7, 2019 by hgpu

CATO: automatic source transformation to apply HPC frameworks with minimal user interaction

Compiler-assisted distribution of OpenMP code for improved scalability

ADIOS2.jl: a Julia interface to ADIOS2

Julia as a unifying end-to-end workflow language on the Frontier exascale system

Code generated HPC Kernels Using Llama-2-70b

Comparing Llama-2 and GPT-3 LLMs for HPC kernels generation

Scope is all you need: Transforming LLMs for HPC Code

pocl - Portable Computing Language

PoCL-R: An Open Standard Based Offloading Layer for Heterogeneous Multi-Access Edge Computing with Server Side Scalability

HPAC-Offload: Accelerating HPC Applications with Portable Approximate Computing on the GPU

openCLDispatcher

Novel insights on atomic synchronization for sort-based group-by on GPUs

CEED Benchmarks

Performant low-order matrix-free finite element kernels on GPU architectures

Sieve: Stratified GPU-Compute Workload Sampling

EngineCL: Usability and Performance in Heterogeneous Computing

Mashing load balancing algorithm to boost hybrid kernels in molecular dynamics simulations

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high performance computing on graphics processing units: hgpu.org

Fast Turnaround HLS Debugging using Dependency Analysis and Debug Overlays

A Highly Parameterizable Framework for Conditional Restricted Boltzmann Machine Based Workloads Accelerated With FPGAs and OpenCL

In-memory database acceleration on FPGAs: a survey

Performance Debugging Frameworks for FPGA High-Level Synthesis

The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface

Heterogeneous Resource-Elastic Management for FPGAs: Concepts, Theory and Implementation

Fast Code Exploration for Pipeline Processing in FPGA Accelerators

High Performance Computing via High Level Synthesis

FBLAS: Streaming Linear Algebra on FPGA

Exploring Portability and Performance of OpenCL FPGA Kernels on Intel HARPv2

FPGA Implementation of Reduced Precision Convolutional Neural Networks

The Study of the OpenCL Processing Models for the FPGA Devices

Recent source codes

CATO: automatic source transformation to apply HPC frameworks with minimal user interaction

ADIOS2.jl: a Julia interface to ADIOS2

Code generated HPC Kernels Using Llama-2-70b

Scope is all you need: Transforming LLMs for HPC Code

pocl - Portable Computing Language

HPAC-Offload: Accelerating HPC Applications with Portable Approximate Computing on the GPU

openCLDispatcher

CEED Benchmarks

Sieve: Stratified GPU-Compute Workload Sampling

EngineCL: Usability and Performance in Heterogeneous Computing

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