{"id":12139,"date":"2014-05-25T06:46:41","date_gmt":"2014-05-25T03:46:41","guid":{"rendered":"http:\/\/hgpu.org\/?p=12139"},"modified":"2014-05-25T06:46:41","modified_gmt":"2014-05-25T03:46:41","slug":"parallel-computation-of-functions-on-set-partitions","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=12139","title":{"rendered":"Parallel Computation of Functions on Set Partitions"},"content":{"rendered":"<p>Many algorithms of practical interest require evaluation of a given function F on each point of a domain consisting of all k-partitions of an N-element set. Because the cardinality of such a domain grows rapidly for fixed k and increasing N, such algorithms are appealing candidates for parallelization; but to implement such parallelization efficiently in a multi-threaded (e.g., GPU\/CUDA) architecture requires that each of Stirling2(N,k) threads determine &#8212; as a function of thread index alone, in time independent of the thread index, and without recourse to inter-thread communication &#8212; a unique corresponding k-partition of the given N-element set. While a number of sequential algorithms are known for recursively enumerating all k-partitions of an N-element set, none of those algorithms can be parallelized while satisfying the requirements above, since each requires that the mth k-partition in the enumeration be known before the (m+1)st k-partition can be computed. This thesis project comprised the design, coding, and testing of a parallel algorithm and corresponding CUDA implementation which do satisfy those requirements.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Many algorithms of practical interest require evaluation of a given function F on each point of a domain consisting of all k-partitions of an N-element set. Because the cardinality of such a domain grows rapidly for fixed k and increasing N, such algorithms are appealing candidates for parallelization; but to implement such parallelization efficiently in [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":true,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[36,11,89,3],"tags":[1787,1782,14,20,674,390],"class_list":["post-12139","post","type-post","status-publish","format-standard","hentry","category-algorithms","category-computer-science","category-nvidia-cuda","category-paper","tag-algorithms","tag-computer-science","tag-cuda","tag-nvidia","tag-nvidia-geforce-8400-gs","tag-thesis"],"views":2183,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/12139","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=12139"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/12139\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=12139"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=12139"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=12139"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}