{"id":1362,"date":"2010-11-09T15:17:16","date_gmt":"2010-11-09T15:17:16","guid":{"rendered":"http:\/\/hgpu.org\/?p=1362"},"modified":"2010-11-09T15:17:16","modified_gmt":"2010-11-09T15:17:16","slug":"accelerating-scientific-computations-with-mixed-precision-algorithms","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=1362","title":{"rendered":"Accelerating Scientific Computations with Mixed Precision Algorithms"},"content":{"rendered":"<p>On modern architectures, the performance of 32-bit operations is often atleast twice as fast as the performance of 64-bit operations. By using acombination of 32-bit and 64-bit floating point arithmetic, the performance ofmany dense and sparse linear algebra algorithms can be significantly enhancedwhile maintaining the 64-bit accuracy of the resulting solution. The approachpresented here can apply not only to conventional processors but also to othertechnologies such as Field Programmable Gate Arrays (FPGA), GraphicalProcessing Units (GPU), and the STI Cell BE processor. Results on modernprocessor architectures and the STI Cell BE are presented.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>On modern architectures, the performance of 32-bit operations is often atleast twice as fast as the performance of 64-bit operations. By using acombination of 32-bit and 64-bit floating point arithmetic, the performance ofmany dense and sparse linear algebra algorithms can be significantly enhancedwhile maintaining the 64-bit accuracy of the resulting solution. The approachpresented here can [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[36,11,3],"tags":[1787,545,1782,377,37,597,625],"class_list":["post-1362","post","type-post","status-publish","format-standard","hentry","category-algorithms","category-computer-science","category-paper","tag-algorithms","tag-cell-processor","tag-computer-science","tag-fpga","tag-linear-algebra","tag-mathematical-software","tag-mixed-precision"],"views":2324,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/1362","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1362"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/1362\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1362"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1362"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1362"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}