Electron tomography (ET) is an important method for studying three-dimensional cell ultrastructure. Combining with a sub-volume averaging approach, ET provides new possibilities for investigating in situ macromolecular complexes in sub-nanometer resolution. Because of the limited sampling angles, ET reconstruction usually suffers from the `missing wedge’ problem. With a validation procedure, Iterative Compressed-sensing Optimized NUFFT reconstruction (ICON) demonstrates its power in the restoration of validated missing information for low SNR biological ET dataset. However, the huge computational demand has become a bottleneck for the application of ICON. In this work, we developed the strategies of parallelization for NUFFT and ICON, and then implemented them on a Xeon Phi 31SP coprocessor to generate the parallel program ICON-MIC. We also proposed a hybrid task allocation strategy and extended ICON-MIC on multiple Xeon Phi cards on Tianhe-2 supercomputer to generate program ICON-MULT-MIC. With high accuracy, ICON-MIC has a significant acceleration compared to the CPU version, up to 13.3x, and ICON-MULT-MIC has good weak and strong scalability efficiency on Tianhe-2 supercomputer.<\/p>\n","protected":false},"excerpt":{"rendered":"
Electron tomography (ET) is an important method for studying three-dimensional cell ultrastructure. Combining with a sub-volume averaging approach, ET provides new possibilities for investigating in situ macromolecular complexes in sub-nanometer resolution. Because of the limited sampling angles, ET reconstruction usually suffers from the `missing wedge’ problem. With a validation procedure, Iterative Compressed-sensing Optimized NUFFT reconstruction […]<\/p>\n","protected":false},"author":734,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":true,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[11,3],"tags":[1599,1483,1970,1760,1971],"class_list":["post-17588","post","type-post","status-publish","format-standard","hentry","category-computer-science","category-paper","tag-intel-mic","tag-intel-xeon-phi","tag-nufft","tag-supercomputer","tag-tianhe-2"],"views":4305,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/17588","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/734"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=17588"}],"version-history":[{"count":1,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/17588\/revisions"}],"predecessor-version":[{"id":17590,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/17588\/revisions\/17590"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=17588"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=17588"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=17588"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}