{"id":1801,"date":"2010-12-02T20:54:07","date_gmt":"2010-12-02T20:54:07","guid":{"rendered":"http:\/\/hgpu.org\/?p=1801"},"modified":"2010-12-02T20:54:07","modified_gmt":"2010-12-02T20:54:07","slug":"gpu-histogram-computation","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=1801","title":{"rendered":"GPU histogram computation"},"content":{"rendered":"<p>Due to the immense computational power of today&#8217;s graphics processors (GPU), general purpose computation on GPUs has become a vivid research area. The performance of algorithms running on GPUs highly depends on how well they can be arranged to \ufb01t and exploit the processors single instruction multiple data (SIMD) architecture. Many tasks that are considered simple on a CPU such as grouping and counting of values of a domain for statistical purposes appear rather challenging to be implemented on a GPU. In this poster, we present a method to compute histograms in shader programs. On the example of image segmentation, we show that our method enables iterative and histogram guided algorithms to run ef\ufb01ciently on graphics hardware without costly CPU intervention. Using an image segmentation example, we demonstrate how the algorithm can be optimized for smaller regions of interest inside larger domains.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Due to the immense computational power of today&#8217;s graphics processors (GPU), general purpose computation on GPUs has become a vivid research area. The performance of algorithms running on GPUs highly depends on how well they can be arranged to \ufb01t and exploit the processors single instruction multiple data (SIMD) architecture. Many tasks that are considered [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[11,3],"tags":[1782,20,888,367],"class_list":["post-1801","post","type-post","status-publish","format-standard","hentry","category-computer-science","category-paper","tag-computer-science","tag-nvidia","tag-nvidia-geforce-7900-gt","tag-shaders"],"views":2791,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/1801","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1801"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/1801\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1801"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1801"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1801"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}