{"id":1860,"date":"2010-12-05T16:37:32","date_gmt":"2010-12-05T16:37:32","guid":{"rendered":"http:\/\/hgpu.org\/?p=1860"},"modified":"2010-12-05T16:37:32","modified_gmt":"2010-12-05T16:37:32","slug":"optical-flow-computation-on-compute-unified-device-architecture","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=1860","title":{"rendered":"Optical Flow Computation on Compute Unified Device Architecture"},"content":{"rendered":"<p>In this study, the implementation of an image processing technique on Compute Unified Device Architecture (CUDA) is discussed. CUDA is a new hardware and software architecture developed by NVIDIA Corporation for the generalpurpose computation on graphics processing units. CUDA features an on-chip shared memory with very fast general read and write access, which enables threads in a block to share their data effectively. CUDA also provides a userfriendly development environment through an extension to the C programming language. This study focused on CUDA implementation of a representative optical flow computation proposed by Horn and Schunck in 1981. Their method produces the dense displacement field and has a straightforward processing procedure. A CUDA implementation of Horn and Schunck&#8217;s method is proposed and investigated based on simulation results.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>In this study, the implementation of an image processing technique on Compute Unified Device Architecture (CUDA) is discussed. CUDA is a new hardware and software architecture developed by NVIDIA Corporation for the generalpurpose computation on graphics processing units. CUDA features an on-chip shared memory with very fast general read and write access, which enables threads [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[89,33,3],"tags":[14,1786,20],"class_list":["post-1860","post","type-post","status-publish","format-standard","hentry","category-nvidia-cuda","category-image-processing","category-paper","tag-cuda","tag-image-processing","tag-nvidia"],"views":1867,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/1860","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1860"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/1860\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1860"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1860"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1860"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}