{"id":2468,"date":"2011-01-13T13:32:58","date_gmt":"2011-01-13T13:32:58","guid":{"rendered":"http:\/\/hgpu.org\/?p=2468"},"modified":"2011-01-13T13:32:58","modified_gmt":"2011-01-13T13:32:58","slug":"speeding-up-mutual-information-computation-using-nvidia-cuda-hardware","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=2468","title":{"rendered":"Speeding up Mutual Information Computation Using NVIDIA CUDA Hardware"},"content":{"rendered":"<p>We present an efficient method for mutual information (MI) computation between images (2D or 3D) for NVIDIA&#8217;s &#8220;compute unified device architecture&#8221; (CUDA) compatible devices. Efficient parallelization of MI is particularly challenging on a &#8220;graphics processor unit&#8221; (GPU) due to the need for histogram-based calculation of joint and marginal probability mass functions (pmfs) with large number of bins. The data-dependent (unpredictable) nature of the updates to the histogram, together with hardware limitations of the GPU (lack of synchronization primitives and limited memory caching mechanisms) can make GPU-based computation inefficient. To overcome these limitation, we approximate the pmfs, using a down-sampled version of the joint- histogram which avoids memory update problems. Our CUDA implementation improves the efficiency of MI calculations by a factor of 25 compared to a standard CPU- based implementation and can be used in MI-based image registration applications.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>We present an efficient method for mutual information (MI) computation between images (2D or 3D) for NVIDIA&#8217;s &#8220;compute unified device architecture&#8221; (CUDA) compatible devices. Efficient parallelization of MI is particularly challenging on a &#8220;graphics processor unit&#8221; (GPU) due to the need for histogram-based calculation of joint and marginal probability mass functions (pmfs) with large number [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[36,11,89,33,3],"tags":[1787,1782,14,1786,20,183],"class_list":["post-2468","post","type-post","status-publish","format-standard","hentry","category-algorithms","category-computer-science","category-nvidia-cuda","category-image-processing","category-paper","tag-algorithms","tag-computer-science","tag-cuda","tag-image-processing","tag-nvidia","tag-nvidia-geforce-8800-gtx"],"views":1987,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/2468","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2468"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/2468\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2468"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2468"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2468"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}