{"id":2948,"date":"2011-02-23T19:57:33","date_gmt":"2011-02-23T19:57:33","guid":{"rendered":"http:\/\/hgpu.org\/?p=2948"},"modified":"2011-02-23T19:57:33","modified_gmt":"2011-02-23T19:57:33","slug":"architectural-comparisons-for-a-quantum-monte-carlo-application","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=2948","title":{"rendered":"Architectural Comparisons for a Quantum Monte Carlo Application"},"content":{"rendered":"<p>Recent technological advances have led to a number of emerging platforms such as multi-cores, reconfigurable computing, and graphics processing units. We present a comparative study of multi-cores, field-programmable gate arrays, and graphics processing units for a Quantum Monte Carlo chemistry application. The speedups of these implementations are measured relative to a multi-core implementation and the accuracy of each implementation compared against the double-precision CPU implementation. The Brook+ AMD implementation shows the best overall speedup and accuracy, with the mixed-precision NVIDIA CUDA implementation outperforming the Brook+ implementation for larger atomic clusters with a slightly lower accuracy than the Brook+ and FPGA implementations.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Recent technological advances have led to a number of emerging platforms such as multi-cores, reconfigurable computing, and graphics processing units. We present a comparative study of multi-cores, field-programmable gate arrays, and graphics processing units for a Quantum Monte Carlo chemistry application. The speedups of these implementations are measured relative to a multi-core implementation and the [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[11,89,3],"tags":[995,7,218,1782,14,377,72,20,819,199],"class_list":["post-2948","post","type-post","status-publish","format-standard","hentry","category-computer-science","category-nvidia-cuda","category-paper","tag-amd-firestream-9170","tag-ati","tag-brook","tag-computer-science","tag-cuda","tag-fpga","tag-monte-carlo-simulation","tag-nvidia","tag-qmc","tag-tesla-c1060"],"views":2230,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/2948","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2948"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/2948\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2948"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2948"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2948"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}