{"id":3082,"date":"2011-03-03T13:44:16","date_gmt":"2011-03-03T13:44:16","guid":{"rendered":"http:\/\/hgpu.org\/?p=3082"},"modified":"2011-03-03T13:44:16","modified_gmt":"2011-03-03T13:44:16","slug":"unified-a-sharp-turn-in-the-latest-era-of-graphic-processors","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=3082","title":{"rendered":"Unified &#8211; A Sharp Turn in the Latest Era of Graphic Processors"},"content":{"rendered":"<p>The need of high performance and realism has increased a lot in the last few decades, especially in gaming, 3D graphics and computationally demanding applications. It has compelled the GPU vendors to put their best effort towards the improvement of ILP (Instruction Level Parallelism). As a result of which, the GPU has entered in a new generation of unified graphic processors. Unified graphic processor unifies the vertex and pixel processors and extends them. This technology provides the best ever performance along with the limited die cost and compatibility. This paper provides a brief overview of the technology behind the unified graphic processor. It tells how the unified technology has evolved and how then it has introduced a huge discrete jump in hardware performance of the previous technologies. The unified graphics and computing architecture pays the cost of complexity and throughput as well, which is more than that of the non-unified processors. This cost must be reduced by applying different techniques in future.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The need of high performance and realism has increased a lot in the last few decades, especially in gaming, 3D graphics and computationally demanding applications. It has compelled the GPU vendors to put their best effort towards the improvement of ILP (Instruction Level Parallelism). As a result of which, the GPU has entered in a [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[11,89,3],"tags":[1782,14,20,183,70,31],"class_list":["post-3082","post","type-post","status-publish","format-standard","hentry","category-computer-science","category-nvidia-cuda","category-paper","tag-computer-science","tag-cuda","tag-nvidia","tag-nvidia-geforce-8800-gtx","tag-programming-techniques","tag-review"],"views":1990,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/3082","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=3082"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/3082\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=3082"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=3082"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=3082"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}