{"id":3353,"date":"2011-03-27T20:36:00","date_gmt":"2011-03-27T20:36:00","guid":{"rendered":"http:\/\/hgpu.org\/?p=3353"},"modified":"2011-03-27T20:36:00","modified_gmt":"2011-03-27T20:36:00","slug":"exploiting-parallelism-in-iterative-irregular-maxflow-computations-on-gpu-accelerators","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=3353","title":{"rendered":"Exploiting Parallelism in Iterative Irregular Maxflow Computations on GPU Accelerators"},"content":{"rendered":"<p>The Graphics Processing Unit (GPU) is an asymmetric, heterogeneous multi-core architecture that can be used for high performance parallel computing applications. However, a significant level of interest has been focused on algorithms for solving regular problems, as these applications typically map well to the GPU. Irregular applications, which rely on pointer or graph-based data structures, have not been as extensively studied and are significantly more difficult to implement or map in an efficient fashion on the GPU. In this paper, we consider a graph-based maximum flow algorithm that has applications in network optimization problems. In the literature, the push-relabel maximum flow algorithm has been considered on the GPU. We believe that Malhotra, Pramodh Kumar and Maheshwari&#8217;s algorithm is better suited for the GPU due to the synchronous, iterative nature of the algorithm. As a result, we choose this algorithm for our study. We show that the performance of the GPU algorithm far exceeds that of a sequential CPU algorithm.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The Graphics Processing Unit (GPU) is an asymmetric, heterogeneous multi-core architecture that can be used for high performance parallel computing applications. However, a significant level of interest has been focused on algorithms for solving regular problems, as these applications typically map well to the GPU. Irregular applications, which rely on pointer or graph-based data structures, [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[36,11,89,3],"tags":[1787,1782,14,158,20],"class_list":["post-3353","post","type-post","status-publish","format-standard","hentry","category-algorithms","category-computer-science","category-nvidia-cuda","category-paper","tag-algorithms","tag-computer-science","tag-cuda","tag-graph-theory","tag-nvidia"],"views":1919,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/3353","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=3353"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/3353\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=3353"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=3353"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=3353"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}