{"id":6346,"date":"2011-11-21T14:33:15","date_gmt":"2011-11-21T12:33:15","guid":{"rendered":"http:\/\/hgpu.org\/?p=6346"},"modified":"2011-11-21T14:33:15","modified_gmt":"2011-11-21T12:33:15","slug":"conflux-embedding-massively-parallel-semantics-in-a-high-level-programming-language","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=6346","title":{"rendered":"Conflux: Embedding Massively Parallel Semantics in a High-Level Programming Language"},"content":{"rendered":"<p>As of late massively parallel devices have become mainstream and are widely used in research and industry. But even despite recent advances of the API, programming these devices has proven to be a difficult and error-prone task. We have designed Conflux, an embedded domain-specific language that integrates massively parallel semantics into a high-level programming language. Conflux utilizes operations, type system, and data structures of a host language and provides an extensible framework for mapping those to concrete device-specific implementations. We have prototyped an embedding for C# language and a mapping that translates Conflux code for execution on CUDA GPUs and multicore CPUs. Our approach improves programmability of massively parallel algorithms and makes high-performance more accessible for developers.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>As of late massively parallel devices have become mainstream and are widely used in research and industry. But even despite recent advances of the API, programming these devices has proven to be a difficult and error-prone task. We have designed Conflux, an embedded domain-specific language that integrates massively parallel semantics into a high-level programming language. [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[36,11,89,3],"tags":[1787,1782,14,95,20,176],"class_list":["post-6346","post","type-post","status-publish","format-standard","hentry","category-algorithms","category-computer-science","category-nvidia-cuda","category-paper","tag-algorithms","tag-computer-science","tag-cuda","tag-high-level-languages","tag-nvidia","tag-package"],"views":2369,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/6346","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=6346"}],"version-history":[{"count":0,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/6346\/revisions"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=6346"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=6346"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=6346"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}