{"id":8329,"date":"2012-10-06T11:45:12","date_gmt":"2012-10-06T08:45:12","guid":{"rendered":"http:\/\/hgpu.org\/?p=8329"},"modified":"2012-10-13T11:55:52","modified_gmt":"2012-10-13T08:55:52","slug":"gpgpu-accelerated-optimization-method-of-interconnection-network-topology","status":"publish","type":"post","link":"https:\/\/hgpu.org\/?p=8329","title":{"rendered":"GPGPU accelerated optimization method of Interconnection Network Topology"},"content":{"rendered":"<p>The optimization of the irregular connection network of the multiprocessor systems with the distributed memory is the NP complete problem which is generally compute-intensive process. Graphics processing units provide a large computational power at a very low price allowing the fine-grained parallelism. This work investigates the use of the GPU in the parallelisation of the optimal irregular network configurations up to 128 processors. We used a modified hill climbing optimization technique for finding better solutions for interconnection network topology. Using NVIDIA&#8217;s Compute Unified Device Architecture, our implementation achieves a processing speed up of 1.71 to 7.96 times over a sequential Central Processing Unit approach and it is comparable to existing approaches.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The optimization of the irregular connection network of the multiprocessor systems with the distributed memory is the NP complete problem which is generally compute-intensive process. Graphics processing units provide a large computational power at a very low price allowing the fine-grained parallelism. This work investigates the use of the GPU in the parallelisation of the [&hellip;]<\/p>\n","protected":false},"author":351,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":false,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[11,89,3],"tags":[1782,14,158,20,554,298],"class_list":["post-8329","post","type-post","status-publish","format-standard","hentry","category-computer-science","category-nvidia-cuda","category-paper","tag-computer-science","tag-cuda","tag-graph-theory","tag-nvidia","tag-nvidia-geforce-9800-gt","tag-optimization"],"views":2677,"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/8329","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/users\/351"}],"replies":[{"embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=8329"}],"version-history":[{"count":1,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/8329\/revisions"}],"predecessor-version":[{"id":8358,"href":"https:\/\/hgpu.org\/index.php?rest_route=\/wp\/v2\/posts\/8329\/revisions\/8358"}],"wp:attachment":[{"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=8329"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=8329"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hgpu.org\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=8329"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}