Programming model for a heterogeneous x86 platform
Intel Corporation
In PLDI ’09: Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation (2009), pp. 431-440.
@article{saha2009programming,
title={Programming model for a heterogeneous x86 platform},
author={Saha, B. and Zhou, X. and Chen, H. and Gao, Y. and Yan, S. and Rajagopalan, M. and Fang, J. and Zhang, P. and Ronen, R. and Mendelson, A.},
journal={ACM SIGPLAN Notices},
volume={44},
number={6},
pages={431–440},
issn={0362-1340},
year={2009},
publisher={ACM}
}
The client computing platform is moving towards a heterogeneous architecture consisting of a combination of cores focused on scalar performance, and a set of throughput-oriented cores. The throughput oriented cores (e.g. a GPU) may be connected over both coherent and non-coherent interconnects, and have different ISAs. This paper describes a programming model for such heterogeneous platforms. We discuss the language constructs, runtime implementation, and the memory model for such a programming environment. We implemented this programming environment in a x86 heterogeneous platform simulator. We ported a number of workloads to our programming environment, and present the performance of our programming environment on these workloads.
November 6, 2010 by hgpu
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