Towards Modeling Energy Consumption of Xeon Phi
Old Dominion University, 1300 Engineering and Computational Sciences Building
arXiv:1505.06539 [cs.DC], (25 May 2015)
@article{lawson2015towards,
title={Towards Modeling Energy Consumption of Xeon Phi},
author={Lawson, Gary and Sosonkina, Masha and Shen, Yuzhong},
year={2015},
month={may},
archivePrefix={"arXiv"},
primaryClass={cs.DC}
}
In the push for exascale computing, energy efficiency is of utmost concern. System architectures often adopt accelerators to hasten application execution at the cost of power. The Intel Xeon Phi co-processor is unique accelerator that offers application designers high degrees of parallelism, energy-efficient cores, and various execution modes. To explore the vast number of available configurations, a model must be developed to predict execution time, power, and energy for the CPU and Xeon Phi. An experimentation method has been developed which measures power for the CPU and Xeon Phi separately, as well as total system power. Execution time and performance are also captured for two experiments conducted in this work. The experiments, frequency scaling and strong scaling, will help validate the adopted model and assist in the development of a model which defines the host and Xeon Phi. The proxy applications investigated, representative of large-scale real-world applications, are Co-Design Molecular Dynamics (CoMD) and Livermore Unstructured Lagrangian Explicit Shock Hydrodynamics (LULESH). The frequency experiment discussed in this work is used to determine the time on-chip and off-chip to measure the compute- or latencyboundedness of the application. Energy savings were not obtained in symmetric mode for either application.
May 28, 2015 by hgpu
