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Evaluating the capabilities of the Xeon Phi platform in the context of software-only, thread-level speculation

Alvaro Estebanez, Diego R. Llanos, Arturo Gonzalez-Escribano
Departamento de Informatica, Universidad de Valladolid, Campus M. Delibes, 47011 Valladolid, Spain
International Symposium on High Level Parallel Programming and Applications (HLPP), 2015

@article{estebanez2015evaluating,

   title={Evaluating the capabilities of the Xeon Phi platform in the context of software-only, thread-level speculation},

   author={Estebanez, Alvaro and Llanos, Diego R and Gonzalez-Escribano, Arturo},

   year={2015}

}

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Intel Xeon Phi accelerators are one of the newest devices used in the field of parallel computing. However, there are comparatively few studies concerning their performance when using most of the existing parallelization techniques. One of them is thread-level speculation, a technique that optimistically tries to extract parallelism of loops without the need of a compile-time analysis that guarantees that the loop can be executed in parallel. In this article we evaluate the performance delivered by an Intel Xeon Phi coprocessor when using a software, state-of-the-art thread-level speculative parallelization library in the execution of well-known benchmarks. Our results show that, although the Xeon Phi delivers a relatively good speedup in comparison with a shared-memory architecture in terms of scalability, the low computing power of its computational units when specific vectorization and SIMD instructions are not exploited, indicates that further development of new specific techniques for this platform is needed to make it competitive for the application of speculative parallelization comparing with high-end processors or conventional shared-memory systems.
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