State-of-the-art in heterogeneous computing
SINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, Norway
Scientific Programming, Vol. 18, No. 1. (1 January 2010), pp. 1-33
@article{brodtkorb2010state,
title={State-of-the-art in heterogeneous computing},
author={Brodtkorb, A.R. and Dyken, C. and Hagen, T.R. and Hjelmervik, J.M. and Storaasli, O.O.},
journal={Scientific Programming},
volume={18},
number={1},
pages={1–33},
issn={1058-9244},
year={2010},
publisher={IOS Press}
}
Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, available software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.
November 22, 2010 by hgpu