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Design and Implementation of CNN-FPGA accelerator based on Open Computing Language

Praveena Bai Desavathu, A Ravi Raja, Er. Sipra Patra, Rabinarayan Satpathy, S. John Pimo, Sankararao Majji
PVP Siddartha Institute of Technology, Andrapradesh, India
First International Conference on Electrical, Electronics, Information and Communication Technologies, 2022

@article{siddhartha2022design,

   title={Design and Implementation of CNN-FPGA accelerator based on Open Computing Language},

   author={Siddhartha, Velagapudi Ramakrishna},

   year={2022}

}

In a wide range of applications, convolutional neural networks (CNNs) have been widely used, including face and speech recognition, picture retrieval and classification, and automated driving. As a result, CNN accelerators have become a popular topic of discourse. CNN Accelerators Graphics processing units (GPU) are often employed in CNN accelerators, and they are referred to as CNN accelerators (GPUs). High-level synthesis tools based on the Open Computing Language (OpenCL) for FPGAs, which are more energy-efficient than graphics processing units (GPUs), can reduce the time required for verification and implementation. PipeCNN is being operated on an FPGA that is compliant with the DE10 standard. The OpenCL design for Alexnet makes use of the ARM and the FPGA to accelerate the algorithm’s execution. Following that, we’ll look at how memory reads and convolutions can be used to improve the performance of PipeCNN.
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