Towards Alignment of Parallelism in SYCL and ISO C++
Intel Corporation, USA
International Workshop on OpenCL (IWOCL’23), 2023
@inproceedings{pennycook2023towards,
title={Towards Alignment of Parallelism in SYCL and ISO C++},
author={Pennycook, Simon John and Ashbaugh, Ben and Brodman, James and Kinsner, Michael and Larsen, Steffen and Lueck, Greg and Schulz, Roland and Voss, Michael},
booktitle={Proceedings of the 2023 International Workshop on OpenCL},
pages={1–9},
year={2023}
}
SYCL began as a C++ abstraction for OpenCL concepts, whereas parallelism in ISO C++ evolved from the algorithms in the standard library. This history has resulted in the two specifications using different terminology to describe parallelism, which is confusing to developers and hinders the SYCL community’s efforts to influence the direction of C++ through experiments and proof points. Critically, SYCL does not provide mechanisms for developers to reason about specific device behaviors that may impact the execution of parallel programs, such as the forward progress guarantees at various levels of the execution model hierarchy. The N-dimensional range (ND-range) execution model currently defined by SYCL extends the C++ model, but does not relate it to concepts or formalisms of C++ parallelism. This paper presents: (1) a detailed analysis of parallelism terminology in SYCL and ISO C++; (2) proposed modifications to the SYCL standard, to align with C++17; and (3) a generalized abstract ND-range execution model introducing the notion of hierarchical forward progress guarantees. To demonstrate the potential impact of these changes, we outline a new extension to SYCL enabling developers to understand and potentially control device behavior across the hierarchy. Although discussed in the context of SYCL, the changes outlined in this paper have broader implications for all languages building upon an ND-range model (e.g. OpenCL). Our abstract hierarchical execution model applies generally to modern data parallel languages, many of which don’t yet comprehend the hierarchical nature of the hardware architectures that they target.
May 14, 2023 by hgpu