Mathematical limits of parallel computation for embedded systems
Computer Science Department, SUNY Binghamton
Proceedings of the 16th Asia and South Pacific Design Automation Conference, ASPDAC ’11, 2011
@inproceedings{loew2011mathematical,
title={Mathematical limits of parallel computation for embedded systems},
author={Loew, J. and Elwell, J. and Ponomarev, D. and Madden, P.H.},
booktitle={Proceedings of the 16th Asia and South Pacific Design Automation Conference},
pages={653–660},
year={2011},
organization={IEEE Press}
}
Embedded systems are designed to perform a specific set of tasks, and are frequently found in mobile, power-constrained environments. There is growing interest in the use of parallel computation as a means to increase performance while reducing power consumption. In this paper, we highlight fundamental limits to what can and cannot be improved by parallel resources. Many of these limitations are easily overlooked, resulting in the design of systems that, rather than improving over prior work, are in fact orders of magnitude worse.
September 23, 2011 by hgpu
